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Special Issue (1) 2010, 71-79

High Performance Computing on New Accelerated Hardware Architectures

Błażewicz Jacek, Kurowski Krzysztof, Ludwiczak Bogdan, Napierała Krystyna

Poznań Supercomputing and Networking Center
Applications Department
ul. Noskowskiego 10, 61-704 Poznań, Poland,
e-mail: {marqs/krzysztof.kurowsk/bogdanl/krysia}@man.poznan.pl

Received:

Received: 15 July 2010; revised: 29 October 2010; published online: 23 November 2010

DOI:   10.12921/cmst.2010.SI.01.71-79

OAI:   oai:lib.psnc.pl:688

Abstract:

This paper presents recent work that has been performed in the context of high performance computing and hybrid architectures at Poznan Supercomputing and Networking Center. Three algorithms: JPEG2000 – compression/decompression, computational fluid mechanics and motion tracking have been parallelized on various architectures and compared to reference
sequential applications. The performance results, implementation issues and best practices are discussed as well.

Key words:

GPGPU, hardware accelerators, high performance, hybrid computing, NVIDIA CUDA

References:

[1] A.J. Chorin, J.E. Marsden, A Mathematical Introduction to Fluid Dynamics (2000).
[2] F.H. Harlow, J.E. Welch, Numerical Calculation of Time- Dependent Viscous Incompressible Flow of Fluid with Free Surface (1965).
[3] M. Matyka, Computer Simulations in Physics (2002).
[4] K.G. Derpan, The Harris Corner Detector (2004).
[5] J.P. Lewis, Fast Normalized Cross-correlation, Industrial Light & Magic (1995)
[6] Nov. 2000. ISO/IEC 15444-1: Information technology, JPEG 2000.
[7] ISO/IEC 10918-1: Information technology, Digital compression and coding of continuous still images: Requirements and guidelines, 1994.
[8] W. Sweldens, The lifting scheme: a new philosophy in biorthogonal wavelet constructions, in: proceedings of the SPIE. Wavelet Applications in Signal and Image Processing III, 2569, 68-79S (1995).

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