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Special Issue (1) 2010, 63-69

Utilization of FPGA Architectures for High Performance Computations

Dąbrowska-Boruch Agnieszka 1,2, Jamro Ernest 1,2, Janiszewski Marcin 2, Kuna Dawid 2, Machaczek Krzysztof 2, Russek Paweł 1,2, Wiatr Kazimierz 1,2, Wielgosz Maciej 1,2

1Department of Electronics AGH,
al. Mickiewicza 30, 30-059 Kraków, Poland
2ACC Cyfronet AGH,
Nawojka 11, 30-950 Kraków, Poland
e-mail: {russek/jamro/wiatr/wielgosz}@agh.edu.pl; {Dawid.Kuna/Machaczek}@cyfronet.kraków.pl

Received:

Received: 20 August 2010; revised: 20 October 2010; published online: 23 November 2010

DOI:   10.12921/cmst.2010.SI.01.63-69

OAI:   oai:lib.psnc.pl:687

Abstract:

The primary intention of this paper is to present the results of several cases where the FPGA technology was used for high performance calculations. We gathered applications that had been developed over the last couple of years. Over this period of time we observed that there had been a rapid growth of interest in the utilization of FPGA for HPC. Basing on our expertise we give selected metrics, results and conclusions which, in our opinion, are important for anyone who is interested in FPGA as an alternative for faster computations. A brief description of the characteristics of FPGA and FPGA usage for acceleration are also included for novices on the subject.

Key words:

custom computing, dedicated architectures, hardware acceleration, reconfigurable computing

References:

[1] R. Susukita et al., Hardware accelerator for molecular dynamics: MDGRAPE-2. Computer Physics Communications 155 (2), 115131 (2003).
[2] SGI Corp. Sgi rasc rc100 blade. http://www.sgi.com/pdfs/3920.pdf/
[3] Mitrionics AB. Mitrion Users’ Guide. http://www.mitrion.com/.
[4] Impulse-C Homepage. http://www.impulseaccelerated.com/
[5] M. Wielgosz, E. Jamro, P. Russek, K. Wiatr, Hardware implementation of the orbital function for quantum chemistry calculations. Applied Reconfigurable Computing, Springer-
Verlag, LNCS 5992, 337-342. ARC’2010,
[6] M. Janiszewski, P. Russek, E. Jamro, K. Wiatr, Implementation of Montgomery Exponentiation in FPGA for Cryptographic Applications. KU KDM 2010, Zakopane, March 18–19, 2010, Abstracts.
[7] K. Machaczek, P. Russek, E. Jamro, K. Wiatr, Realizacja szybkiego wyszukiwania wzorców w układach FPGA. Pomiary, Automatyka, Kontrola, 54 (8) 540–542, Abstr.
[8] ACK Cyfronet. The Computing Acceleration Group Homepage. http://www.cyf-kr.edu.pl/en/?a=zao/ReconfigurableComputing.
[9] P. Russek, K. Wiatr, Dedicated architecture for double precision matrix multiplication in supercomputing environment. Proceedings of the 2007 IEEE workshop on Design and Diagnostics of Electronic Circuits and Systems, April 11–13, 2007, Cracow, Poland.
[10] W. Kohn, L.J. Sham, Self-Consistent Equations Including Exchange and Correlation Effects. Phys Rev A, 140, 1133 (1965).
[11] P.L. Montgomery, Modular Multiplication without Trivial Division. Mathematics of Computation. 26, 27, 519-521 (1985).
[12] B.H. Bloom, Space/time trade-offs in hash coding with allowable errors. Communications of the ACM, 13, 422- 426 (1970).
[13] T.H. Cormen, C.E. Leiserson, R.L. Rivest, Introduction to Algorithms. The MIT Press and McGraw-Hill Book Company (1989).

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